Digital systems employ network connections and/or data buses, referred to collectively as communication channels, to communicate between various subsystems. For example, a central processing unit may communicate with a disc storage module through a channel. The bandwidth of the channel is determined by several factors including a number of parallel communication lanes in the channel. A given digital system can employ a number of various channels between its subsystems, with each channel being best suited to its particular application in the digital system.
In some circumstances, it is necessary for data to travel over more than one channel as it propagates from one subsystem to another. In such instances a first-in, first-out (FIFO) buffer can be employed between the two communication channels provided that they are both serial communication channels and/or clocked parallel channels.
In some cases the first channel includes a plurality of lanes that are not synchronized by a clock and the second channel is a serial channel. In such a case the data on each lane of the first channel can include an alignment symbol that is read by a buffer between the first channel and the second channel. The buffer can use the alignment symbols in the lanes to eliminate skew between the data arriving over the first channel, and then aggregate the realigned data onto the serial second channel.